I2C getting started.

For a full description of the I2C basics and essentials, please consult the official Philips documentation "The I2C-bus and how to use it", Philips ordercode "9398 393 40011". Or visit one of their websites but first try: http://www.semiconductors.philips.com.


The signal lines.

Communication is carried out via three wires: SDA, SCL and GND. That's why it is mostly referred to as "the two wire bus". Which of course is ridiculous, since you always need at least one reference line. The only true two-wire bus is Dallas Semiconductor's "one-wire bus"! It seems essential for manufacturers to minimize the leadcount needed to communicate.

The two signals SCL (Serial CLock) and SDA (Serial DAta) are open collector in/outputs, equipped with (normally) a 4k7 pull-up resistor.

At rest, both SDA and SCL are HIGH (positive supply voltage, logic "1"). In normal conditions, SDA never, ever, changes states when SCL is HIGH. SDA toggles, if necessary, when SCL is LOW.


Start condition (S).

To call the I2C bus to attention, a so called START- or S-condition is generated. This is done by keeping SCL high and flipping SDA to a LOW:


An active I2C bus.

At this moment, the bus is active and the IC's are ready to accept data. Remember that the bus is specified at 100 kHz maximum, so keep at least 5 microseconds between two consequtive signal edges.

Now the I2C transactions can begin. First, an address is sent, followed by additional parameters. The address is built up as follows:

value of bit 1 0 0 1 1 0 1 R/w
position of bit in I2C address 7 6 5 4 3 2 1 0

The actual address is composed, left jusitified, in the 7 MSB's. The LSB (bit 0) is the R/W bit. "READ = 1", "WRITE = 0". Bits are transferred MSB first. After each byte which is sent, the slave, i.e. the device which is NOT writing to the bus, issues an ACKnowledge pulse: it pulls the SDA line low until the next SCL-low is reached.


Stop condition (P).

At the end of transmission, a socalled STOP- (or P-) condition is issued. This in fact is a reverse S condition:

SDA is made HIGH, when SCL is in the supposedly stable state.


An example: communicating with the PCF 8571 SRAM chip.

I2C Monitor circuit drawing

The pin numbers apply to a special connector I used to use a lot, many many moons ago. It was a DB25-to-RJ-11 converter. In the table below, I will explain how the pins were connected. The bullet numbers refer to the numbers of the RJ-11 phoneline connector:

  1. Centronics DB25 pin 2 (D0)
  2. Centronics DB25 pin 11 (NOT Busy)
  3. Centronics DB25 pin 3 (D1)
  4. Centronics DB25 pin 10 (INT)
  5. Centronics DB25 pin 12 (Paper End)
  6. Centronics DB25 pin 24 (GND)


An example: communicating with the PCF 8571 SRAM chip.

For writing data to a PCF 8571 SRAM chip, hardware connected to address 5 (101), the sequence is as follows:


For reading the RAM back:


Manual control of the bus with the 'I2C monitor'

In general, using the extremely lowlevel 0, 1, C and D commands, you can control the bus as follows in the next example:



Reading from the bus Writing to the bus
8 x TAB keypress and read back
the bit in the BIT-field
Press "0" to send an ACK
Use "1" and "0" keys to enter
a byte of data
Enable an ACK by pressing the "1" key.


Alternative ways to control the bus:


Rounding up.

As mentioned before, this is NOT a full description of the I2C bus. It is only meant as either a fresh-up or an encouragement to get the correct application notes and databooks from either Philips, Dallas, Maxim or Microchip.


Page created June 2003,